The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized ...

Architecture framework further enriched with full support for ARM® AXI4 specification, AMBA 4 ACE cache coherency and a broad range of optimized tightly coupled extensions for wireless applications ...

SANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the pioneer and leader of RISC-V computing today announced two new products designed to address new requirements for high performance compute. The ...

ClearSpeed Technology, a provider of low-power chip-based systems, has unveiled the CS301 processor, a multithreaded chip designed to improve performance and reduce power consumption for ...

Eran Briman, vice president of marketing at CEVA, commented: “The CEVA-XC4500 DSP is a game-changer for wireless infrastructure applications, combining powerful fixed- and floating-point vector ...

Most chips today are built from a combination of customized logic blocks that deliver some special sauce, and off-the-shelf blocks for commonplace technologies such as I/O, memory controllers, etc.

While most articles in this section discuss the reprogramming of graphics processors, other large arrays of processing elements are available as standard-product ICs for other applications. In some ...